Rajesh Garg

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Minimizing and Exploiting Leakage in VLSI Design
Minimizing and Exploiting Leakage in VLSI DesignMinimizing and Exploiting Leakage in VLSI Design
Minimizing and Exploiting Leakage in VLSI Design
Suganth Paul, Rajesh Garg, Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri
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Analysis and Design of Resilient VLSI Circuits
Analysis and Design of Resilient VLSI CircuitsAnalysis and Design of Resilient VLSI Circuits
Analysis and Design of Resilient VLSI Circuits
Rajesh Garg, Sunil P. Khatri
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