Jean-Michel Sallese

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Parasitic Substrate Coupling in High Voltage Integrated Circuits
Parasitic Substrate Coupling in High Voltage Integrated CircuitsParasitic Substrate Coupling in High Voltage Integrated Circuits
Parasitic Substrate Coupling in High Voltage Integrated Circuits
Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese, Maher Kayal
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